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Overall Flow of Control

This note provides an overview of the rather convoluted flow of control through the main internal classes responsible for scheduling and execution of VrSigProc signal processing modules.

This is intended for maintainers of GNU Radio, and understanding this is not required to build or use signal processing modules or applications built using GNU Radio.

The Players

The main players in the scheduling game are VrMultiTask and VrSigProc. VrBuffer and VrConnect play supporting roles. VrSigProc is the base class for all signal processing modules, and hence is the center of most user development. Each VrSigProc has-a VrBuffer for each of its distinct outputs. Virtually all VrSigProcs have only a single output. A given VrSigProc is the only writer of its downstream VrBuffer. A VrSigProc connects to its upstream inputs using a VrConnect for each. VrConnect are the glue between an upstream VrSigProc's output buffer and the downstream VrSigProc's inputs.

Note that VrBuffers and VrConnects are automatically created for the user when the processing modules are linked together using the CONNECT macro or VrSigProc::connect_proc method at initialization time.

Non-Threaded Implementation

This note assumes that everything is already initialized, and begins with the call VrMultiTask::process which typically takes place in the main loop of the application.

VrMultiTask::process does a tail call to ::schedule

VrMultiTask::schedule finds the sink that is furthest behind. This is done by determining its idea of time by computing VrSigProc::getMarkedWP() / VrSigProc::getSamplingFrequency() for each sink. Note that this result is in units of seconds.

Then, for each of the connected sinks, in order of "behindness", schedule builds a VrSampleRange with index = getMarkedWP() and size = getMaxOutputSize(), and calls VrSigProc::markData() passing it the VrSampleRange.

After completing this loop on all sinks, schedule calls VrSigProc::compute on startMarkedModule, a global VrSigProc *, that is set as a side effect of markData.

VrSigProc::compute

VrSigProc::compute()'s job is to attempt to complete all previously scheduled (marked) work. It proceeds by calling itself recursively on all of the inputs of the current module. If this is successful, then the inputs for the current module are ready. Compute then invokes the current module's ::work procedure to produce its output. Thus, scheduling takes place from the sinks to the sources, but the actual computation of data takes place from the sources to the sinks.

compute finishes by detaching the module from the upstream linked list of readers (the inputs we just consumed) and detaching the module from the writer list (more on these later).

VrSigProc::markData

This function contains most of the ``hair'' of the scheduling algorithm.

Threaded Implementation

Mutexes and Friends

VrMultiTask contains a mutex (named mutex) that is held whenever schedule is called. Since schedule is the top of the root of callers of VrSigProc::markData, this mutex is held during all calls to markData and ensures that only one thread at a time is manipulating the data structures required for scheduling.

Each VrSigProc also contains a mutex (to maximize confusion, also named mutex), that is used to serialize access to its writer list [and maybe more stuff -- need to check this out]

Each VrConnect also contains a mutex (to maximize confusion, also named mutex), that is used to serialize access to the linked lists of readers.

WP, markedWP and minRP

VrSigProc::WP is the "Write Pointer." All data up to WP has been written.

VrSigProc::markedWP is the "Marked Write Pointer." All data up to markedWP has been marked to be written (i.e., scheduled to be written), but has not yet been written.

VrSigProc::proc_minRP is the "minimum Reader Pointer" in use by any of the down stream readers of this module. It defines the lowest VrSampleIndex that must remain valid.


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